base:24bit_division_24-bit_result

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base:24bit_division_24-bit_result [2017-03-18 10:41] (current) verz created |
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+ | It's just an enlarged version of the 16-bit division. There' | ||

+ | < | ||

+ | ; Executes an unsigned integer division of a 24-bit dividend by a 24-bit divisor | ||

+ | ; the result goes to dividend and remainder variables | ||

+ | ; | ||

+ | ; Verz!!! 18-mar-2017 | ||

+ | div24 lda #0 ;preset remainder to 0 | ||

+ | sta remainder | ||

+ | sta remainder+1 | ||

+ | sta remainder+2 | ||

+ | ldx #24 ;repeat for each bit: ... | ||

+ | |||

+ | divloop asl dividend ; | ||

+ | rol dividend+1 | ||

+ | rol dividend+2 | ||

+ | rol remainder ; | ||

+ | rol remainder+1 | ||

+ | rol remainder+2 | ||

+ | lda remainder | ||

+ | sec | ||

+ | sbc divisor ; | ||

+ | tay ;lb result -> Y, for we may need it later | ||

+ | lda remainder+1 | ||

+ | sbc divisor+1 | ||

+ | sta pztemp | ||

+ | lda remainder+2 | ||

+ | sbc divisor+2 | ||

+ | bcc skip ;if carry=0 then divisor didn't fit in yet | ||

+ | |||

+ | sta remainder+2 ; | ||

+ | lda pztemp | ||

+ | sta remainder+1 | ||

+ | sty remainder | ||

+ | inc dividend ;and INCrement result cause divisor fit in 1 times | ||

+ | |||

+ | skip dex | ||

+ | bne divloop | ||

+ | rts | ||

+ | |||

+ | dividend .ds 3 | ||

+ | divisor .ds 3 | ||

+ | remainder .equ $fb ; remainder is in zero-page to gain some cycle/byte ($fb-$fd) | ||

+ | pztemp .equ $fe | ||

+ | |||

+ | </ |

base/24bit_division_24-bit_result.txt ยท Last modified: 2017-03-18 10:41 by verz