base:6510_instructions_by_addressing_modes
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— | base:6510_instructions_by_addressing_modes [2015-04-17 04:30] (current) – created - external edit 127.0.0.1 | ||
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+ | ===== 6510 Instructions by Addressing Modes ===== | ||
+ | |||
+ | < | ||
+ | off- ++++++++++ Positive ++++++++++ | ||
+ | set 00 20 40 60 80 a0 c0 e0 mode | ||
+ | |||
+ | +00 BRK | ||
+ | +01 ORA | ||
+ | +02 | ||
+ | +03 SLO* RLA* SRE* RRA* SAX* LAX* DCP* ISB* (indir,x) | ||
+ | +04 NOP* BIT | ||
+ | +05 ORA | ||
+ | +06 ASL | ||
+ | +07 SLO* RLA* SRE* RRA* SAX* LAX* DCP* ISB* Zeropage | ||
+ | |||
+ | +08 PHP | ||
+ | +09 ORA | ||
+ | +0a ASL | ||
+ | +0b ANC** | ||
+ | +0c NOP* BIT | ||
+ | +0d ORA | ||
+ | +0e ASL | ||
+ | +0f SLO* RLA* SRE* RRA* SAX* LAX* DCP* ISB* Absolute | ||
+ | |||
+ | +10 BPL | ||
+ | +11 ORA | ||
+ | +12 | ||
+ | +13 SLO* RLA* SRE* RRA* SHA** | ||
+ | +14 NOP* NOP* NOP* NOP* STY | ||
+ | +15 ORA | ||
+ | +16 ASL | ||
+ | +17 SLO* RLA* SRE* RRA* SAX* y) LAX* y) DCP* ISB* Zeropage,x | ||
+ | |||
+ | +18 CLC | ||
+ | +19 ORA | ||
+ | +1a NOP* NOP* NOP* NOP* TXS | ||
+ | +1b SLO* RLA* SRE* RRA* SHS** | ||
+ | +1c NOP* NOP* NOP* NOP* SHY** | ||
+ | +1d ORA | ||
+ | +1e ASL | ||
+ | +1f SLO* RLA* SRE* RRA* SHA**y) LAX* y) DCP* ISB* Absolute,x | ||
+ | |||
+ | ROR intruction is available on MC650x microprocessors after | ||
+ | June, 1976. | ||
+ | |||
+ | |||
+ | Legend: | ||
+ | |||
+ | t Jams the machine | ||
+ | *t Jams very rarely | ||
+ | * | ||
+ | ** Unusual operation | ||
+ | y) indexed using Y instead of X | ||
+ | () indirect instead of absolute | ||
+ | |||
+ | Note that the NOP instructions do have other addressing modes | ||
+ | than the implied addressing. The NOP instruction is just like | ||
+ | any other load instruction, | ||
+ | result anywhere nor affects the flags. | ||
+ | </ | ||
base/6510_instructions_by_addressing_modes.txt · Last modified: 2015-04-17 04:30 by 127.0.0.1