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base:detecting_6526_vs_6526a_cia_chips

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base:detecting_6526_vs_6526a_cia_chips [2015-04-17 04:31] – external edit 127.0.0.1base:detecting_6526_vs_6526a_cia_chips [2017-10-26 07:18] white_flame
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 ====== Detecting 6526 vs 6526A CIA Chips ====== ====== Detecting 6526 vs 6526A CIA Chips ======
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 +by White Flame
  
 This sets off a single-shot NMI to interrupt immediately before an INC statement.  The older 6526 triggers one cycle later, so it will run the INC while the newer one won't. This sets off a single-shot NMI to interrupt immediately before an INC statement.  The older 6526 triggers one cycle later, so it will run the INC while the newer one won't.
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  pla  pla
  pla</code>  pla</code>
-White Flame (aka David Holz)\\ +
-http://www.white-flame.com/+
  
 Note by Karoshier: I had problems making this work once adapted to use CIA1 instead of CIA2, as the interrupt wouldn't fire at all and the CPU remained locked in the JMP *. The cause of this was the two consecutive LDA $DC0D before the INC oldCIA instruction. It happened by chance that one of them had been cycle-exact synchronized with the CIA and cleared the interrupt flag in the very same cycle as the one in which the interrupt was asserted. The interrupt pulse didn't last enough and the CPU didn't see it (tried on both VICE 2.4 and on the real hardware). I have solved the problem by replacing those LDA $DC0D with NOPs and readjusting the number of clock cycles the timer A is set to timeout at. Note by Karoshier: I had problems making this work once adapted to use CIA1 instead of CIA2, as the interrupt wouldn't fire at all and the CPU remained locked in the JMP *. The cause of this was the two consecutive LDA $DC0D before the INC oldCIA instruction. It happened by chance that one of them had been cycle-exact synchronized with the CIA and cleared the interrupt flag in the very same cycle as the one in which the interrupt was asserted. The interrupt pulse didn't last enough and the CPU didn't see it (tried on both VICE 2.4 and on the real hardware). I have solved the problem by replacing those LDA $DC0D with NOPs and readjusting the number of clock cycles the timer A is set to timeout at.
base/detecting_6526_vs_6526a_cia_chips.txt · Last modified: 2018-02-24 10:33 by tww_ctr