base:different_cpu_types
no way to compare when less than two revisions
Differences
This shows you the differences between two versions of the page.
— | base:different_cpu_types [2015-04-17 04:31] (current) – created - external edit 127.0.0.1 | ||
---|---|---|---|
Line 1: | Line 1: | ||
+ | ====== Different CPU types ====== | ||
+ | |||
+ | The Rockwell data booklet 29651N52 (technical information about R65C00 microprocessors, | ||
+ | |||
+ | < | ||
+ | 1. Indexed addressing across page boundary. | ||
+ | NMOS: Extra read of invalid address. | ||
+ | CMOS: Extra read of last instruction byte. | ||
+ | |||
+ | 2. Execution of invalid op codes. | ||
+ | NMOS: Some terminate only by reset. Results are undefined. | ||
+ | CMOS: All are NOPs (reserved for future use). | ||
+ | |||
+ | 3. Jump indirect, operand = XXFF. | ||
+ | NMOS: Page address does not increment. | ||
+ | CMOS: Page address increments and adds one additional cycle. | ||
+ | |||
+ | 4. Read/ | ||
+ | NMOS: One read and two write cycles. | ||
+ | CMOS: Two read and one write cycle. | ||
+ | |||
+ | 5. Decimal flag. | ||
+ | NMOS: Indeterminate after reset. | ||
+ | CMOS: Initialized to binary mode (D=0) after reset and interrupts. | ||
+ | |||
+ | 6. Flags after decimal operation. | ||
+ | NMOS: Invalid N, V and Z flags. | ||
+ | CMOS: Valid flag adds one additional cycle. | ||
+ | |||
+ | 7. Interrupt after fetch of BRK instruction. | ||
+ | NMOS: Interrupt vector is loaded, BRK vector is ignored. | ||
+ | CMOS: BRK is executed, then interrupt is executed. | ||
+ | </ | ||
base/different_cpu_types.txt · Last modified: 2015-04-17 04:31 by 127.0.0.1