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base:efficient_tod_initialisation

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base:efficient_tod_initialisation [2019-05-17 12:58]
silverdr [Dual purpose]
base:efficient_tod_initialisation [2019-05-20 11:45]
silverdr [Proper solution]
Line 44: Line 44:
  
 which correspond to the four possible C64 hardware setup combinations. Comparing to $51, which falls more or less in the middle, gives us the expected answer. If the HI byte of the timer has value higher than $51 we have 60Hz supplied to the TOD pin. If OTOH it has lower value, we have 50Hz supplied. which correspond to the four possible C64 hardware setup combinations. Comparing to $51, which falls more or less in the middle, gives us the expected answer. If the HI byte of the timer has value higher than $51 we have 60Hz supplied to the TOD pin. If OTOH it has lower value, we have 50Hz supplied.
 +
 +Advantages:
 +  * Does not break on Super-CPU and similar
 +  * No screen side-effects
 +  * Short and fast
  
 Please also note that we use CIA #2 and not CIA #1. CIA #2 is chosen because changing the timer values there does not affect regular IRQ timings. Moreover, KERNAL re-initialises those timers whenever it wants to use them. This saves as a few bytes, which would otherwise be needed to save and restore timer registers'​ original values. Last and least we do not disable NMIs as it is assumed that checking/​setting the params will be done as part of application initialisation,​ before setting up IRQ/NMI handlers. Please also note that we use CIA #2 and not CIA #1. CIA #2 is chosen because changing the timer values there does not affect regular IRQ timings. Moreover, KERNAL re-initialises those timers whenever it wants to use them. This saves as a few bytes, which would otherwise be needed to save and restore timer registers'​ original values. Last and least we do not disable NMIs as it is assumed that checking/​setting the params will be done as part of application initialisation,​ before setting up IRQ/NMI handlers.
base/efficient_tod_initialisation.txt ยท Last modified: 2020-01-31 17:49 by silverdr