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--- base:improved_clockslide [2017-02-28 08:16] – Consistent use of 'clock slide'. lft
+++ base:improved_clockslide [2017-04-27 01:17] (current) – copyfault
@@ Line 41: / Line 41: @@
 The downside is that we now have an alignment requirement. Sometimes it may not be possible to adjust the starting address of the delay code. But note that we can insert dummy bytes just after the branch instruction, as long as we update the computation of A accordingly.
+=== Slight variation ===
+by //Copyfault//
+Optionally, if the Z-flag reflects the value of the accumulator, then the following variation is also possible:
+           ; delay 18-A cycles
+                               ; 31..41 (A in range 0..10)
+           sta     branch+1
+                               ; 35..45
+  branch   BNE     *
+                               ; 37     (if A=0: no add. branch-cylce, no pb-cycle)
+                               ; 39..47 (if A=1..9: add. branch-cycle)
+                               ; 49     (if A=10: +branch-cycle +pb-cycle)
+           ; --- clock slide starts here ---
+           nop                 ; 39
+           lda     #$a9        ; 41
+           lda     #$a9        ; 43
+           lda     #$a9        ; 45
+           lda     $eaa5       ; 49
+           ; ---    end of clock slide   ---
+           ; page-crossing here!
+           ; at cycle 49
+If A=0, the branch is not taken; thus the total sum of cycles wasted by the clockslide until the page break will be 11. In case of a non-vanishing A, the NOP-instruction is skipped (-2 cycles) but the additional "branch taken"-cycle comes in. Mind that if you want to slide down to 2 cycle-delay the page break is mandatory! A one-cycle delay is not possible but this is the same with the "BPL"-instruction which always comes with that additional cycle.