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+ | ====== Programming docs for the Silversurfer serial port ====== | ||
+ | < | ||
+ | This document is freely distributable as long as it is not changed, and one | ||
+ | of the sources www.jschoenfeld.com, | ||
+ | is mentioned. | ||
+ | last update: March 1st, 2001 | ||
+ | |||
+ | The silversurfer serial port uses a 16c550 UART Chip by California | ||
+ | Microdevices (www.calmicro.com). The datasheet is not available on | ||
+ | the internet, if you are interested in timing details, contact me directly, | ||
+ | as Calmicro has discontinued the part, and is no longer supporting developers | ||
+ | with datasheets. The UART is compatible with the common 16c550 | ||
+ | implementations, | ||
+ | The full part number is CM16C550PE. CM is Calmicro' | ||
+ | package (PLCC-44 in this case). | ||
+ | |||
+ | There is somebody on the internet who claims to have developed the | ||
+ | Silversurfer. He gives technical information without any background, and | ||
+ | claims that the datasheet is available on www.cmd.com. Please do not disturb | ||
+ | the guys from CMD, as this is a storage company, they never made chips like | ||
+ | the 16c550. This is just the proof that the guy is lying - he may do good | ||
+ | software, but nothing else. | ||
+ | |||
+ | The silversurfer is available in two versions. The basic version is meant for | ||
+ | the clock-port of the A1200. The 16c550 has eight registers, and some | ||
+ | multiplexed registers for the Baud Rate generator. The address space for the | ||
+ | clock-port is 16 bytes, and the Silversurfer occupies all of them. The upper | ||
+ | eight registers are mirrors of the lower eight registers. In the following | ||
+ | text, I will only talk about the lower eight addresses, but you must keep in | ||
+ | mind that there may be a mirror. I'm using the term "may be" because you have | ||
+ | the possibiliy to disable one of the two blocks by closing a jumper (see | ||
+ | further down). | ||
+ | |||
+ | The second version is the " | ||
+ | and a different memory map when connected to the 26-pin expansion port. When | ||
+ | connected to the clock-port (with a cable!), the memory map is the same as | ||
+ | with the standard version. | ||
+ | |||
+ | summary of registers: | ||
+ | (note: DLAB is short for Divisor Latch Access Bit, it's bit#7 in register#3) | ||
+ | |||
+ | Number: 0 | ||
+ | Address in A1200: $d80001 | ||
+ | Address on Limited Edition: Board Offset + port offset + $18 | ||
+ | |||
+ | With DLAB=0: | ||
+ | Reading reads the " | ||
+ | Writing writes to the Transmitter holding register | ||
+ | With DLAB=1: | ||
+ | Divisor Latch (lower significant byte) | ||
+ | |||
+ | Number: 1 | ||
+ | Address in A1200: $d80005 | ||
+ | Address on Limited Edition: Board Offset + port offset + $1a | ||
+ | |||
+ | With DLAB=0: | ||
+ | interrupt enable register | ||
+ | With DLAB=1: | ||
+ | Divisor Latch (most significant byte) | ||
+ | |||
+ | The following registers are not affected by the DLAB bit: | ||
+ | |||
+ | Number: 2 | ||
+ | Address in A1200: $d80009 | ||
+ | Address on Limited Edition: Board Offset + port offset + $1c | ||
+ | read: Interrupt identification register | ||
+ | write: Fifo Control register | ||
+ | |||
+ | Number: 3 | ||
+ | Address in A1200: $d8000d | ||
+ | Address on Limited Edition: Board Offset + port offset + $1e | ||
+ | Line control register | ||
+ | |||
+ | Number: 4 | ||
+ | Address in A1200: $d80011 | ||
+ | Address on Limited Edition: Board Offset + port offset + $38 | ||
+ | Modem control register | ||
+ | |||
+ | Number: 5 | ||
+ | Address in A1200: $d80015 | ||
+ | Address on Limited Edition: Board Offset + port offset + $3a | ||
+ | Line status register (read only) | ||
+ | |||
+ | Number: 6 | ||
+ | Address in A1200: $d80019 | ||
+ | Address on Limited Edition: Board Offset + port offset + $3c | ||
+ | Modem status register | ||
+ | |||
+ | Number: 7 | ||
+ | Address in A1200: $d8001d | ||
+ | Address on Limited Edition: Board Offset + port offset + $3e | ||
+ | Scratch pad register | ||
+ | ------ | ||
+ | |||
+ | With an IRQ enabled, the Silversurfer will issue an IRQ6, no matter where | ||
+ | it is connected. There are no more registers than the chip registers. All | ||
+ | you need is eight addresses. | ||
+ | |||
+ | The Z4 zorro expansion for A1200 computers has four clock-ports. It | ||
+ | is advisable to support them, as many people have bought the Silversurfer | ||
+ | because of the compatibility to this extension: | ||
+ | |||
+ | Add $4000 to all clock-port registers to access a Silversurfer on | ||
+ | clock-port 1 of the Z4 board. | ||
+ | |||
+ | Add $8000 to all clock-port registers to access a Silversurfer on | ||
+ | clock-port 2 of the Z4 board. | ||
+ | |||
+ | Add $c000 to all clock-port registers to access a Silversurfer on | ||
+ | clock-port 3 of the Z4 board. | ||
+ | |||
+ | Check for presence of the Z4 board by checking mirrors of the scratch pad | ||
+ | register. If you write to the scratch pad register at $d8001d and also find | ||
+ | that value at $d8401d, there can be no Z4 board. DO CROSS-CHECKS by writing | ||
+ | the scratch pad register in $d8401d and reading it back on $d8001d, as there | ||
+ | can be trash in the scratch pad from the previous run of your (or other) | ||
+ | software. Writes should be done with different bit-patterns in order to | ||
+ | minimize the possiblity of false identification. | ||
+ | |||
+ | Silversurfer on other clock-ports: | ||
+ | |||
+ | The Buddha Flash also contains a clock-port. This port is located at even | ||
+ | addresses, so substract $d80001 from the clock-port values and add the board | ||
+ | offset plus the port offset. In other words, if the Buddha is located at | ||
+ | $ea0000, the eight registers are at: | ||
+ | |||
+ | $ea0e00 | ||
+ | $ea0e04 | ||
+ | $ea0e08 | ||
+ | $ea0e0c | ||
+ | $ea0e10 | ||
+ | $ea0e14 | ||
+ | $ea0e18 | ||
+ | $ea0e1c | ||
+ | |||
+ | Similar calculation with the X-Surf clock-ports. Mind that one of the | ||
+ | ports uses even addresses, and the other uses odd addresses. This has | ||
+ | been done in order to balance the load on the data lines a bit. While | ||
+ | implementing software for other ports, also look at the Inside_ISDN.txt | ||
+ | file for the port location on the ISDN Surfer Zorro board. | ||
+ | |||
+ | The UART is clocked at 7,372800 Mhz. The frequency may sound odd, but | ||
+ | it is perfect for generating the common baud rates. To operate properly, | ||
+ | the Baud rate generator uses a 16x clock rate, so if you want to set 38400 | ||
+ | baud, the Baud rate generator must be programmed to genberate a 614400 clock. | ||
+ | This is done by calculating 7372800/ | ||
+ | Divisor Latch LSB, and a 0 to the Divisor Latch MSB, and you're done. | ||
+ | |||
+ | Solder-jumpers on the back of the silversurfer: | ||
+ | |||
+ | There are six unused pads on the back of the board. Four of them are | ||
+ | maent for pullup/ | ||
+ | relates to my experience with the non-working Hypercom 1 models, that could | ||
+ | have been debugged with 33pF capacitors on IOR and IOW (unfortunately, | ||
+ | somebody decided to use standard low-cost capacitors, so the bug still | ||
+ | exists - it will not if you use X7R capacitors in SMD style!). The chip | ||
+ | used on the Silversurfer does not need this kind of debugging, it has a | ||
+ | built-in input hysteresis, so noise is filtered on-chip. Just leave the | ||
+ | four pads on the Silversurfer unused, and focus on the other two, which | ||
+ | are more interesting: | ||
+ | resistor to close the jumpers. | ||
+ | |||
+ | Never close both jumpers at the same time! | ||
+ | |||
+ | location of the jumpers: | ||
+ | The diagram shows the silversurfer from the solder-side! | ||
+ | |||
+ | --------------------------- | ||
+ | | | ||
+ | | | | ||
+ | | | | ||
+ | | | | ||
+ | | | | ||
+ | ------ | ||
+ | | ||
+ | | ||
+ | | ||
+ | | ||
+ | | ||
+ | | ||
+ | | ||
+ | | ||
+ | | ||
+ | | ||
+ | | ||
+ | | ||
+ | | ||
+ | | ||
+ | | ||
+ | | ||
+ | | ||
+ | | ||
+ | | ||
+ | | ||
+ | | ||
+ | | ||
+ | | ||
+ | | ||
+ | | ||
+ | |||
+ | Only use pads with numbers, leave the other pads (marked with #) unused!! | ||
+ | |||
+ | Usually, the CS2 signal (pin 16) of the UART is pulled high with a resistor | ||
+ | that is located on the top of the silversurfer. Closing one of the jumpers | ||
+ | applies address line A5 to this pin, either inverted, or double-inverted | ||
+ | (that is, directly). As a result, one of the register banks will be disabled: | ||
+ | |||
+ | Connection 1-2 (R2) will disable the lower register bank | ||
+ | This means, that the UART chip is only located at addresses $d80021 and up | ||
+ | (Mirror on $d80001 and up is free, can be used for other hardware). | ||
+ | |||
+ | Connection 3-4 (R4) will disable the upper register bank | ||
+ | This means, that the UART chip is only located at addresses $d80001 and up | ||
+ | (Mirror on $d80021 and up is free, can be used for other hardware). | ||
+ | |||
+ | These solder-jumpers are also present on the limited edition of the | ||
+ | Silversurfer. Only use them if you are using the clock-port connector, | ||
+ | otherwise you will cause even more confusion with the registers of the | ||
+ | 26-pin connector. | ||
+ | |||
+ | The other unused pads on the opposite side are meant for direct connection of | ||
+ | a DB9-male connector. This has never been used, and will only fit if you | ||
+ | use the Silversurfer on a Zorro board (or in a completely different | ||
+ | enviroment). The orientation of the connector is obvious: Four pins on the | ||
+ | solderside, five pins on the component side will speak for themselves. | ||
+ | |||
+ | If you have any comments or want to have a hardcopy of the California | ||
+ | Microdevices datasheet, send me an e-mail: jens@jschoenfeld.de | ||
+ | ---EOF | ||
+ | </ |
base/inside_surfer.txt · Last modified: 2015-04-17 04:32 by 127.0.0.1