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base:memory_management [2022-03-05 22:51] – typos & minor rewording white_flamebase:memory_management [2022-04-17 05:36] (current) – ultimax clarification, removed bloated PRG info white_flame
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-====== Memory Management ====== 
- 
-(Someone please integrate the texts on this page into one...) 
- 
 ====== Without Cartridges ====== ====== Without Cartridges ======
  
-The low 3 bits of $01 control the mapping of specific regions of memory.  The rules are kind of fiddly:+The low 3 bits of $01 control the mapping of specific regions of memory.  When a bit is set to 0, it activates its bank, but the interplay between them is kind of fiddly:
  
 ^Name ^Bit ^Region ^0 ^1 ^Notes^ ^Name ^Bit ^Region ^0 ^1 ^Notes^
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 The expansion port has 2 configuration inputs (/EXROM and /GAME), and 4 chip select outputs (/IO1, /IO2, /ROML, /ROMH). The expansion port has 2 configuration inputs (/EXROM and /GAME), and 4 chip select outputs (/IO1, /IO2, /ROML, /ROMH).
  
-/IO1 and /IO2 lines are active on both reads & writes, any time that I/O is banked in:+/IO1 and /IO2 lines are active on both reads & writes to their respective memory ranges, any time that I/O is banked in:
   * /IO1 = $DE00 - $DEFF   * /IO1 = $DE00 - $DEFF
   * /IO2 = $DF00 - $DFFF   * /IO2 = $DF00 - $DFFF
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 ===== Cart pulls only /GAME low (Ultimax mode) ===== ===== Cart pulls only /GAME low (Ultimax mode) =====
  
-ROMH replaces the KERNAL at $E000, ROML is still at $8000.  Only the lowest 4kB of internal RAM remains visible, and I/O cannot be swapped out.  None of the bits in $01 affect the banking in this mode.+ROMH replaces the KERNAL at $E000, ROML is still at $8000.  Only the lowest 4kB of internal RAM remains visible, and I/O cannot be swapped out.  $00/01 are still used to drive the tape port, but the low 3 bits are ignored for banking in this mode.
  
-^$0000-0FFF ^$1000-7FFF ^$8000-9FFF ^$A000-CFFF ^$D000-DFFF ^$E000-FFFF ^+^$0002-0FFF ^$1000-7FFF ^$8000-9FFF ^$A000-CFFF ^$D000-DFFF ^$E000-FFFF ^
 |RAM |unmapped |**__ROML__** |unmapped |I/O |**__ROMH__**| |RAM |unmapped |**__ROML__** |unmapped |I/O |**__ROMH__**|
  
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-====== From C64 Programmers Reference Manual ====== 
  
-The following is a Chapter from the C64 Programmers Reference Manual, can be 
-found at the external Link Section. 
- 
-<code> 
-  MEMORY MANAGEMENT ON THE 
-  COMMODORE 64 
- 
-    The Commodore 64 has 64K bytes of RAM. It also has 20K bytes of ROM, 
-  containing BASIC, the operating system, and the standard character set. 
-  It also accesses input/output devices as a 4K chunk of memory. How is 
-  this all possible on a computer with a 16-bit address bus, that is 
-  normally only capable of addressing 64K? 
-    The secret is in the 6510 processor chip itself. On the chip is an 
-  input/output port. This port is used to control whether RAM or ROM or I/O 
-  will appear in certain portions of the system's memory. The port is also 
-  used to control the Datassette(TM), so it is important to affect only the 
-  proper bits. 
-    The 6510 input/output port appears at location 1. The data direction 
-  register for this port appears at location 0. The port is controlled like 
-  any of the other input/output ports in the system... the data direction 
-  controls whether a given bit will be an input or an output, and the 
-  actual data transfer occurs through the port itself. The lines in the 
-  6510 control port are defined as follows: 
- 
- 
-  +---------+---+------------+--------------------------------------------+ 
-  |  NAME   |BIT| DIRECTION  |                 DESCRIPTION                | 
-  +---------+---+------------+--------------------------------------------+ 
-  |  LORAM  | 0 |   OUTPUT   | Control for RAM/ROM at $A000-$BFFF         | 
-  |  HIRAM  | 1 |   OUTPUT   | Control for RAM/ROM at $E000-$FFFF         | 
-  |  CHAREN | 2 |   OUTPUT   | Control for I/O/ROM at $D000-$DFFF         | 
-  |         | 3 |   OUTPUT   | Cassette write line                        | 
-  |         | 4 |   INPUT    | Cassette switch sense (0=play button down) | 
-  |         | 5 |   OUTPUT   | Cassette motor control (0=motor spins)     | 
-  +---------+---+------------+--------------------------------------------+ 
- 
- 
-    The proper value for the data direction register is as follows: 
- 
-                              BITS 5 4 3 2 1 0 
-                              ---------------- 
-                                   1 0 1 1 1 1 
- 
-  (where 1 is an output, and 0 is an input). 
- 
- 
- 
- 
- 
-    This gives a value of 47 decimal. The Commodore 64 automatically sets 
-  the data direction register to this value. 
-    The control lines, in general, perform the function given in their descriptions. 
-  However, a combination of control lines are occasionally used 
-  to get a particular memory configuration. 
-    LORAM (bit 0) can generally be thought of as a control line which banks 
-  the 8K byte BASIC ROM in and out of the microprocessor address space. 
-  Normally, this line is HIGH for BASIC operation. If this line is 
-  programmed LOW, the BASIC ROM will disappear from the memory map and be 
-  replaced by 8K bytes of RAM from $A000-$BFFF. 
-    HIRAM (bit 1) can generally be thought of as a control line which banks 
-  the 8K byte KERNAL ROM in and out of the microprocessor address space. 
-  Normally, this line is HIGH for BASIC operation. If this line is 
-  programmed LOW, the KERNAL ROM will disappear from the memory map and be 
-  replaced by 8K bytes of RAM from $E000-$FFFF. 
-    CHAREN (bit 2) is used only to bank the 4K byte character generator ROM 
-  in or out of the microprocessor address space. From the processor point 
-  of view, the character ROM occupies the same address space as the I/O 
-  devices ($D000-$DFFF). When the CHAREN line is set to 1 (as is normal), 
-  the I/O devices appear in the microprocessor address space, and the 
-  character ROM is not accessable. When the CHAREN bit is cleared to 0, the 
-  character ROM appears in the processor address space, and the I/O devices 
-  are not accessible. (The microprocessor only needs to access the 
-  character ROM when downloading the character set from ROM to RAM. Special 
-  care is needed for this... see the section on PROGRAMMABLE CHARACTERS in 
-  the GRAPHICS chapter). CHAREN can be overridden by other control lines in 
-  certain memory configurations. CHAREN will have no effect on any memory 
-  configuration without I/O devices. RAM will appear from $D000-$DFFF 
-  instead. 
- 
-  +-----------------------------------------------------------------------+ 
-  | NOTE: In any memory map containing ROM, a WRITE (a POKE) to a ROM     | 
-  | location will store data in the RAM "under" the ROM. Writing to a ROM | 
-  | location stores data in the "hidden" RAM. For example, this allows a  | 
-  | hi-resolution screen to be kept underneath a ROM, and be changed      | 
-  | without having to bank the screen back into the processor address     | 
-  | space. Of course a READ of a ROM location will return the contents of | 
-  | the ROM, not the "hidden" RAM.                                        | 
-  +-----------------------------------------------------------------------+ 
- 
- 
- 
- 
- 
- 
-  COMMODORE 64 FUNDAMENTAL MEMORY MAP 
- 
- 
-                                 +----------------------------+ 
-                                       8K KERNAL ROM        | 
-                      E000-FFFF  |           OR RAM           | 
-                                 +----------------------------+ 
-                      D000-DFFF  | 4K I/O OR RAM OR CHAR. ROM | 
-                                 +----------------------------+ 
-                      C000-CFFF  |           4K RAM           | 
-                                 +----------------------------+ 
-                                    8K BASIC ROM OR RAM     | 
-                      A000-BFFF  |       OR ROM PLUG-IN       | 
-                                 +----------------------------+ 
-                                            8K RAM          | 
-                      8000-9FFF  |       OR ROM PLUG-IN       | 
-                                 +----------------------------+ 
-                                                            | 
-                                                            | 
-                                          16 K RAM          | 
-                      4000-7FFF  |                            | 
-                                 +----------------------------+ 
-                                                            | 
-                                                            | 
-                                          16 K RAM          | 
-                      0000-3FFF  |                            | 
-                                 +----------------------------+ 
- 
- 
- 
-  I/O BREAKDOWN 
- 
-    D000-D3FF   VIC (Video Controller)                     1 K Bytes 
-    D400-D7FF   SID (Sound Synthesizer)                    1 K Bytes 
-    D800-DBFF   Color RAM                                  1 K Nybbles 
-    DC00-DCFF   CIA1 (Keyboard)                            256 Bytes 
-    DD00-DDFF   CIA2 (Serial Bus, User Port/RS-232)        256 Bytes 
-    DE00-DEFF   Open I/O slot #l (CP/M Enable)             256 Bytes 
-    DF00-DFFF   Open I/O slot #2 (Disk)                    256 Bytes 
- 
- 
- 
- 
- 
- 
-    The two open I/O slots are for general purpose user I/O, special pur- 
-  pose I/O cartridges (such as IEEE), and have been tentatively designated 
-  for enabling the Z-80 cartridge (CP/M option) and for interfacing to a 
-  low-cost high-speed disk system. 
-    The system provides for "auto-start" of the program in a Commodore 64 
-  Expansion Cartridge. The cartridge program is started if the first nine 
-  bytes of the cartridge ROM starting at location 32768 ($8000) contain 
-  specific data. The first two bytes must hold the Cold Start vector to be 
-  used by the cartridge program. The next two bytes at 32770 ($8002) must 
-  be the Warm Start vector used by the cartridge program. The next three 
-  bytes must be the letters, CBM, with bit 7 set in each letter. The last 
-  two bytes must be the digits "80" in PET ASCII. 
- 
- 
-  COMMODORE 64 MEMORY MAPS 
- 
-    The following table lists the various memory configurations available 
-  on the COMMODORE 64, the states of the control lines which select each 
-  memory map, and the intended use of each map. 
-    The leftmost column of the table contains addresses in hexadecimal 
-  notation. The columns aside it introduce all possible memory 
-  configurations. The default mode is on the left, and the absolutely most 
-  rarely used Ultimax game console configuration is on the right. Each 
-  memory configuration column has one or more four-digit binary numbers as 
-  a title. The bits, from left to right, represent the state of the /LORAM, 
-  /HIRAM, /GAME and /EXROM lines, respectively. The bits whose state does 
-  not matter are marked with "X". For instance, when the Ultimax video game 
-  configuration is active (the /GAME line is shorted to ground, /EXROM kept 
-  high), the /LORAM and /HIRAM lines have no effect. 
- 
- 
- 
- 
- 
- 
- 
- 
- 
- 
- 
- 
- 
- 
- 
- 
-           LHGE   LHGE   LHGE   LHGE   LHGE   LHGE   LHGE   LHGE   LHGE 
- 
-           1111   101X   1000   011X   001X   1110   0100   1100   XX01 
-  10000  default                00X0                             Ultimax 
-  ------------------------------------------------------------------------- 
-   F000 
-          Kernal  RAM    RAM   Kernal  RAM   Kernal Kernal Kernal ROMH(* 
-   E000 
-  ------------------------------------------------------------------------- 
-   D000    IO/C   IO/ IO/RAM  IO/C   RAM    IO/C   IO/  IO/  I/O 
-  ------------------------------------------------------------------------- 
-   C000    RAM    RAM    RAM    RAM    RAM    RAM    RAM    RAM     - 
-  ------------------------------------------------------------------------- 
-   B000 
-          BASIC   RAM    RAM    RAM    RAM   BASIC   ROMH   ROMH    - 
-   A000 
-  ------------------------------------------------------------------------- 
-   9000 
-           RAM    RAM    RAM    RAM    RAM    ROML   RAM    ROML  ROML(* 
-   8000 
-  ------------------------------------------------------------------------- 
-   7000 
- 
-   6000 
-           RAM    RAM    RAM    RAM    RAM    RAM    RAM    RAM     - 
-   5000 
- 
-   4000 
-  ------------------------------------------------------------------------- 
-   3000 
- 
-   2000    RAM    RAM    RAM    RAM    RAM    RAM    RAM    RAM     - 
- 
-   1000 
-  ------------------------------------------------------------------------- 
-   0000    RAM    RAM    RAM    RAM    RAM    RAM    RAM    RAM    RAM 
-  ------------------------------------------------------------------------- 
- 
-     NOTE: (1)    (2)    (3)    (4)    (5)    (6)    (7)    (8)    (9) 
- 
-    *) Internal memory does not respond to write accesses to these areas. 
- 
- 
-  264   BASIC TO MACHINE LANGUAGE 
-~ 
- 
- 
-    Legend: Kernal      E000-FFFF       Kernal ROM. 
- 
-     IO/C        D000-DFFF       I/O address space or Character 
- generator ROM, selected by -CHAREN. 
- If the CHAREN bit is clear, 
- the character generator ROM is 
- chosen. If it is set, the 
- I/O chips are accessible. 
- 
-     IO/RAM      D000-DFFF       I/O address space or RAM, 
- selected by -CHAREN. 
- If the CHAREN bit is clear, 
- the character generator ROM is 
- chosen. If it is set, the 
- internal RAM is accessible. 
- 
-     I/O         D000-DFFF       I/O address space. 
- The -CHAREN line has no effect. 
- 
-     BASIC       A000-BFFF       BASIC ROM. 
- 
-     ROMH        A000-BFFF or    External ROM with the -ROMH line 
- E000-FFFF       connected to its -CS line. 
- 
-     ROML        8000-9FFF       External ROM with the -ROML line 
- connected to its -CS line. 
- 
-     RAM         various ranges  Commodore 64's internal RAM. 
- 
-     -           1000-7FFF and   Open address space. 
- A000-CFFF       The Commodore 64's memory chips 
- do not detect any memory accesses 
- to this area except the VIC-II's 
- DMA and memory refreshes. 
- 
- 
- 
- 
- 
- 
- 
- 
- 
- 
- 
- 
- 
-        (1)   This is the default BASIC memory map which provides 
-              BASIC 2.0 and 38K contiguous bytes of user RAM. 
- 
-        (2)   This map provides 60K bytes of RAM and I/O devices. 
-              The user must write his own I/O driver routines. 
- 
-        (3)   The same as 2, but the character ROM is not 
-              accessible by the CPU in this map. 
- 
-        (4)   This map is intended for use with softload languages 
-              (including CP/M), providing 52K contiguous bytes of 
-              user RAM, I/O devices, and I/O driver routines. 
- 
-        (5)   This map gives access to all 64K bytes of RAM. The 
-              I/O devices must be banked back into the processor's 
-              address space for any I/O operation. 
- 
-        (6)   This is the standard configuration for a BASIC system 
-              with a BASIC expansion ROM. This map provides 32K 
-              contiguous bytes of user RAM and up to 8K bytes of 
-              BASIC "enhancement". 
- 
-        (7)   This map provides 40K contiguous bytes of user RAM 
-              and up to 8K bytes of plug-in ROM for special ROM- 
-              based applications which don't require BASIC. 
- 
-        (8)   This map provides 32K contiguous bytes of user RAM 
-              and up to 16K bytes of plug-in ROM for special 
-              applications which don't require BASIC (word 
-              processors, other languages, etc.). 
- 
-        (9)   This is the ULTIMAX video game memory map. Note that 
-              the 2K byte "expansion RAM" for the ULTIMAX, if 
-              required, is accessed out of the COMMODORE 64 and 
-              any RAM in the cartridge is ignored. 
-</code> 
base/memory_management.1646517107.txt.gz · Last modified: 2022-03-05 22:51 by white_flame